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ordering number : enn7305 33103rm (ot) no. 7305-1/11 overview the STK672-350 is a unipolar fixed-current chopper type 2-phase stepping motor driver hybrid ic. it features power mosfets in the output stage and a built-in phase signal distribution ic. the incorporation of a phase distribution ic allows the STK672-350 to control the speed of the motor based on the frequency of an external input clock signal. it supports two types of excitation for motor control: 2-phase excitation and 1-2 phase excitation. it also provides a function for switching the motor direction. the STK672-350 features an enable pin, a function not provided in the stk672-110. when the enable pin is set low while the clock signal is being supplied, all mosfet devices are forced to the off state. when enable is set high again later, the ic resumes operation, continuing with the prior excitation timing. applications ? two-phase stepping motor drive in send/receive facsimile units ? paper feed in copiers, industrial robots, and other applications that require 2-phase stepping motor drive features ? the motor speed can be controlled by the frequency of an external clock signal (the clock pin signal). ? the excitation type is switched according to the state (low or high) of the mode pin. the mode is set to 2-phase or 1-2 phase excitation on the rising edge of the clock signal. ? a motor direction switching pin (the cwb pin) is provided. ? all inputs are schmitt inputs. ? the motor current can be set by changing the vref pin voltage. since a 0.195- current detection resistor is built in, a current of 1 a is set for each 0.195 v of applied voltage. ? the input frequency range for the clock signal used for motor speed control is 0 to 50 khz. ? supply voltage ranges: v cc 1 = 10 to 42 v ? external supply voltage of 5 v is not necessary. ? this ic supports motor operating currents of up to 1.8 a at tc = 105c, and of up to 2.65 a at tc = 25c. ? provides a function that, during clock input, forces all mosfet devices to the off state when the enable pin is set low, and then, when enable is set high, resumes operation continuing with the prior excitation timing. package dimensions unit: mm 4192 11 2=22 3.3 0.4 2.9 5.1 29.5 24.0 9.0 1.0 112 0.5 2.0 [STK672-350] STK672-350 sanyo electric co.,ltd. semiconductor company tokyo office tokyo bldg., 1-10, 1 chome, ueno, taito-ku, tokyo, 110-8534 japan unipolar fixed-current chopper (self-excited pwm) scheme and built-in phase signal distribution ic two-phase stepping motor driver (square wave drive) output current: 1.8 a thick-film hybrid ic any and all sanyo products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircrafts control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo representative nearest you before using any sanyo products described or contained herein in such applications. sanyo assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo products described or contained herein.
no. 7305- 2 /11 STK672-350 parameter symbol conditions ratings unit maximum supply voltage v cc max no signal 52 v input voltage v in max logic input pins C0.3 to +4.75 v output current i oh max v dd = 5 v, clock 3 200 hz 2.65 a repeated avalanche capacity ear max 28 mj power loss pd max with an arbitrarily large heat sink. per mosfet 6.5 w operating substrate temperature tc max 105 c junction temperature tj max 150 c storage temperature tstg C40 to +125 c specifications maximum rating at tc = 25 c parameter symbol conditions ratings unit supply voltage v cc with signals applied 10 to 42 v input voltage v ih 0 to 4.75 v phase current 1 i oh 1 tc = 105 c, clock 3 200 hz 1.8 a phase current 2 i oh 2 tc = 80 c, clock 3 200 hz 2.1 a see the motor current (i oh ) derating curve clock frequency f cl minimum pulse width: at least 10 s 0 to 50 khz phase driver withstand voltage v dss i d = 1 ma (tc = 25 c) 100 min v recommended operating substrate temperature range tc no condensation 0 to 105 c allowable operating ranges at ta = 25 c parameter symbol conditions ratings unit min typ max v dd supply current i cco clock = gnd 4.0 8 ma output current i oave with r/l = 3 /3.8 mh in each phase 0.36 0.40 0.44 a vref = 0.137 v fet diode forward voltage vdf if = 1 a (r l = 23 ) 1.2 1.8 v output saturation voltage vsat r l = 23 0.70 1.00 v high-level input voltage v ih pins 8 to 12 (5 pins) 2.5 v low-level input voltage v il pins 8 to 12 (5 pins) 0.6 v input current i il with pins 8 to 12 at the ground level. 10 a vref input voltage vrh pin 7 0 3.5 v vref input bias current i ib with pin 7 at 1 v 50 500 na pwm frequency fc 35 45 55 khz electrical characteristics at tc = 25 c, v cc = 24 v, v dd = 5 v note: a fixed-voltage power supply must be used.
internal equivalent circuit block diagram no. 7305- 3 /11 STK672-350 8 6 5 a 10 9 4 ab 3 b 2 bb 1 gnd v cc (24 v) v dd v ss mode clock cwb 7 11 resetb 12 enable mode clock cwb resetb excitation mode selection phase advance counter phase excitation signal generation chopping circuit enable vre f f1 fao fab fbo fbb ai bi ci f2 f3 f4 r1 r2 itf02179 5 v regulator
sample application circuit ? to minimize noise in the 3.3-v system, locate the ground side of capacitor co2 in the above circuit as close as possible to pin 1 of the ic. also, if at all possible, the ground used for vref must not be common to the p.gnd pattern, but must be directly wired from pin 1. ? insert resistor ro3 (47 to 100 ) so that the discharge energy from capacitor co4 is not directly applied to the cmos ic in this hybrid device. if the diode d1 has vf characteristics with vf less than or equal to 0.6 v (when if = 0.1 a), this will be smaller than the cmos ic input pin diode vf. if this is the case ro3 may be replaced with a short without problem. ? both ttl and cmos levels are used for the pin 8, 9, 10, 11 and 12 inputs. ? since the input pins do not have built-in pull-up resistors, when the open-collector type pins 8, 9, 10, 11, and 12 are used as inputs, a 10 to 47 k pull-up resistor (to v dd ) must be used. ? to prevent incorrect operation due to chopping noise, we recommend inserting 470 to 1000 pf capacitors between pin 1 and each of the pins 8, 9, 10, and 12. (with the open-collector type ic, we also recommend inserting a 470 to 1000 pf capacitor between pin 11 (resetb) and pin 1 when pin 11 is used as an input.) ? the following circuit (for a lowered current of over 0.2 a) is recommended if the application needs to temporarily lower the motor current. here, a value of close to 100 k must be used for resistor ro1 to make the transistor output saturation voltage as low as possible. no. 7305- 4 /11 STK672-350 two-phase stepping motor itf02180 STK672-350 3.3 v clock mode cwb 3.3 v 3.3 v resetb 6 9 8 10 11 7 enable 12 d1 ro3 ro4 20 k co4 10 f ro1 vref ro2 0.1 f co1 + + 5 a 4 ab 3 b 2 bb 1 gnd co2 at least 100 f v cc 24 v p.gnd 3.3 v ro1 ro2 ro3 vref itf02181 itf02182 3.3 v ro1 ro2 ro3 vref
no. 7305- 5 /11 STK672-350 input pin functions (ttl input levels) pin pin no. function input conditions when operating clock 9 reference clock for motor phase current switching operates on the rising edge of the signal mode 8 excitation mode selection low: 2-phase excitation high: 1-2 phase excitation cwb 10 motor direction switching low: cw (forward) high: ccw (reverse) resetb 11 system reset and a, ab, b, and bb outputs cutoff. a reset is applied by a low level applications must apply a reset signal for at least 10 s when v dd is first applied. the a, ab, b, and bb outputs are turned off, and after operation is restored by the a, ab, b, and bb outputs are turned enable 12 returning the enable pin to the high level, operation continues with the same off by a low-level input. excitation timing as before the low-level input. i oh = vref rs vref = (r02 (r01 + r02)) 5 v (or 3.3 v) rs is the hybrid ic internal current detection resistor. in the STK672-350 (and stk672-330) rs is 0.195 . (in the stk672-340 and stk672-360, rs is 0.14 .) ? motor current peak value i oh setting i oh o itf02173 (1) a simple reset function is formed from d1, co4, ro3, and ro4 in this application circuit. with the clock input held low, when the 3.3 v supply voltage is brought up a reset is applied if the motor output phases a and bb are driven. if the 3.3-v suppl voltage rise time is slow (over 50 ms), the motor output phases a and bb may not be driven. increase the value of the capacitor co4 and check circuit operation again. (2) with the STK672-350 and stk672-360, after providing v dd to the ic internal circuits by applying a 24 v level to pin 6, the ic will be reset by the simple reset circuit described in item (1) above when the 3.3 v level is supplied. if the 3.3 v level is supplied first and then the 24 v level, the simple reset circuit described in item (1) above will not operate. if the 3.3 v level is supplied first, the ic must be reset by applying a low-level signal directly to pin 11 before supplying the 24 v level. (3) see the timing chart for the concrete details on circuit operation. usage notes ? STK672-350 input signal functions and timing (specifications common to the stk672-340, 350, and 360 as well) (all inputs have no internal pull-up resistor and are ttl level schmitt trigger inputs.) [resetb and clock (input signal timing when power is first applied)] as shown in the timing chart, a resetb signal input is required by the driver to operate with the timing in which the f1 gate is turned on first. the resetb signal timing must be set up to have a width of at least 10 s, as shown below. the capacitor co4, ro3, and the resistor ro4 in the application circuit form simple reset circuit that uses the rc time constant rising time. however, when designing the resetb input based on v ih levels, the application must have the timing shown in figure 1.
no. 7305- 6 /11 STK672-350 note: in the STK672-350 and 360, the resetb signal must be input at least 10 s after the rise of the motor power supply vcc level (10 v, minimum), not after the rise of the 5 v power supply (4.5 v, minimum). clock (phase switching clock) ? input frequency: dc to 50 khz ? minimum pulse width: 10 s ? signals are read on the rising edge. cwb (motor direction setting) the direction of rotation is switched by setting cwb to 1 (high) or 0 (low). see the timing charts for details on the operation of the outputs. note: the state of the cwb input must not be changed during the 6.25 s period before and after the rising edge of the clock input. enable (forcible on/off control of the a, ab, b, and bb outputs, and selection of the operate or hold state for hybrid ic internal operation) enable = 1 (high): normal operation enable = 0 (low): outputs a, ab, b, and bb forced to the off state. if, during the state where clock signal input is provided, the enable pin is set to 0 (low) and then is later restored to the 1 (high) state, the ic will resume operation with the excitation timing continued from before the point enable was set to 0 (low). mode (excitation mode selection) mode = 0 (low): 2-phase excitation mode = 1 (high): 1-2 phase excitation see the timing charts for details on output operation in these modes. note: the state of the mode input must not be changed during the 5 s period before and after the rising edge of the clock input. ? allowable motor current operating range the motor current (i o ) must be held within the range corresponding to the area under the curve shown in figure 3. for example, if the operating substrate temperature tc is 105 c, then i o must be held under i o max = 1.8 a, and in hold mode i o must be held under i o max = 1.5 a. figure 1 resetb and clock signals input timing rise of the 5-v supply voltage resetb signal input clock signal at least 10 s at least 5 s
? thermal design [operating range in which a heat sink is not used] the STK672-350 package has a structure that uses no screws, and is recommended for use without a heat sink. this section discusses the safe operating range when no heat sink is used. in the maximum ratings specifications, tc max is specified to be 105 c, and when mounted in an actual end product system, the tc max value must never be exceeded during operation. tc can be expressed by formula (a) below, and thus the range for ? tc must be stipulated so that tc is always under 105 c. tc = ta + ? tc (a) ta: hybrid ic (h-ic) ambient temperature, ? tc: temperature increase across the aluminum substrate as shown in figure 5, the value of ? tc increases as the hybrid ic internal average power dissipation p d increases. as shown in figure 4, p d increases with the motor current. here we describe the actual p d calculation using the example shown in the motor current timing chart in figure 2. since there are periods when current flows and periods when the current is off during actual motor operation, p d cannot be determined from the data presented in figure 4. therefore, we calculate p d assuming that actual motor operation consists of repetitions of the operation shown in figure 2. no. 7305- 7 /11 STK672-350 figure 2 motor current timing t1: motor rotation operation time t2: motor hold operation time t3: motor current off time t2 may be reduced, depending on the application. t0: single repeated motor operating cycle io1 and io2: motor current peak values due to the structure of motor windings, the phase current is a positive and negative current with a pulse form. note that figure 2 presents the concepts here, and that the on/off duty of the actual signals will differ. the hybrid ic (h-ic) internal average power dissipation p d can be calculated from the following formula. p d = (t1 p1 + t2 p2 + t3) ? t0 (i) (here, p1 is the p d for io1 and p2 is the p d for io2) if the value calculated in formula (i) above is under 1.5 w, then from figure 5 we see that operation is allowed up to an ambient temperature ta of 60 c. while the operating range when a heat sink is not used can be determined from formula (i) above, figure 4 is merely a single example of one operating mode for a single motor. for example, while figure 4 shows a 2-phase excitation motor, if 1-2 phase excitation is used with a 500-hz clock frequency, the drive will be turned off for 25% of the time and the dissipation p d will be reduced to 75% of that in figure 4. it is extremely difficult for sanyo to calculate the internal average power dissipation p d for all possible end product conditions. after performing the above rough calculations, always install the hybrid ic (h-ic) in an actual end product and verify that the substrate temperature tc does not rise above 105 c. motor phase current (sink side) itf02175
timing chart no. 7305- 8 /11 STK672-350 mode reset cwb clock enable fao fab fbo fbb mode reset cwb clock enable fao fab fbo fbb 2-phase excitation 1-2 phase excitation
no. 7305- 9 /11 STK672-350 mode reset cwb clock enable fao fab fbo fbb mode reset cwb clock enable fao fab fbo fbb 1-2 phase excitation (cwb) switching from 2-phase to 1-2 phase excitation
no. 7305- 10 /11 STK672-350 mode reset cwb clock enable fao fab fbo fbb 1-2 phase excitation (enable)
ps no. 7305- 11 /11 STK672-350 this catalog provides information as of march, 2003. specifications and information herein are subject to change without notice. specifications of any and all sanyo products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customers products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customers products or equipment. sanyo electric co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo electric co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the delivery specification for the sanyo product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. sanyo believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. 3.0 2.5 2.0 1.5 motor current, i oh a substrate temperature rise, ? tc c hybrid ic internal average power dissipation, p d w 1.0 0.5 0 0 10 20 30 40 50 60 70 80 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 0.5 1.0 1.5 2.0 2.5 3.0 10 20 30 40 50 60 70 80 90 100 110 itf02176 itf02177 itf02178 figure 3 figure 5 200 hz, 2 phase excitation v cc = 24 v 500 hz, 2 phase excitation motor r = 0.63 i = 0.62 mh the data are peak values. hold mode figure 4 i oh tc ? tc p d p d i oh operating substrate temperature, tc c hybrid ic internal average power dissipation, p d w motor current, i oh c

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